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MCF5271 - 32-bit Embedded Controller Division

Description

Technical Data © Freescale Semiconductor, Inc., 2004.

All rights reserved.

Features

  • Reset.
  • Separate reset in and reset out signals.
  • Six sources of reset: Power-on reset (POR), External, Software, Watchdog, PLL loss of clock, PLL loss of lock.
  • Status flag indication of source of last reset.
  • General Purpose I/O interface.
  • Up to 61 bits of general purpose I/O.
  • Bit manipulation supported via set/clear functions.
  • Unused peripheral pins may be used as extra GPIO JTAG support for system level board testing.

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Other Datasheets by Freescale Semiconductor (now NXP Semiconductors)

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MCF5270 32-bit Embedded Controller Division
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com Freescale Semiconductor Hardware Specification MCF5271EC Rev. 1.2, 12/2004 MCF5271 Integrated Microprocessor Hardware Specification 32-bit Embedded Controller Division The MCF5271 family is a highly integrated implementation of the ColdFire® family of reduced instruction set computing (RISC) microprocessors. This document describes pertinent features and functions of the MCF5271 family. The MCF5271 family includes the MCF5271 and MCF5270 microprocessors. The differences between these parts are summarized below in Table 1. This document is written from the perspective of the MCF5271 and unless otherwise noted, the information applies also to the MCF5270.
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