MCF5475
Overview
- ColdFire V4e Core - Limited superscalar V4 ColdFire processor core - Up to 266 MHz peak internal core frequency (410 MIPS (Dhrystone 2.1) @ 266 MHz) - Harvard architecture - 32-Kbyte instruction cache - 32-Kbyte data cache - Memory Management Unit (MMU) - Floating point unit (FPU)
- Internal master bus (XLB) arbiter
- 32-bit double data rate (DDR) synchronous DRAM (SDRAM) controller - 66-133 MHz operation
- Version 2.2 peripheral component interconnect (PCI) bus
- Flexible multi-function external bus (FlexBus)
- Communications I/O subsystem - Intelligent 16 channel DMA controller, with support for - Dedicated DMA channels for receive and transmit on all subsystem peripheral interfaces - Up to two (2) 10/100 Mbps fast Ethernet controllers (FECs) - Universal serial bus (USB) version 2.0 device controller - Up to four (4) programmable serial controllers (PSCs) for UART, USART, modem, codec, and IrDA 1.1 interfaces - I2C peripheral interface - DMA Serial Peripheral Interface (DSPI)
- Optional Cryptography accelerator module - DES/3DES block cipher - AES block cipher - RC4 stream cipher - MD5/SHA-1/SHA-256/HMAC hashing - Random Number Generator
- 32-Kbyte system SRAM
- System integration unit (SIU) - Interrupt controller - Watchdog timer - Two (2) 32-bit slice timers - Up to four (4) 32-bit general-purpose timers - General-purpose I/O ports multiplexed with peripheral pins
- Debug and test features - ColdFire backgrou
