* Four e500mc Power Architecture cores, each with a backside 128 KB L2 cache with ECC
* Three levels of instructions: User, supervisor, and hypervisor
* Independent boot and reset
* Secure boot capability
* CoreNet fabric supporting coherent and non-coherent
P3041
Freescale Semiconductor
1.92 MB
Qoriq integrated processor.
Freescale Semiconductor Data Sheet: Technical Data Document Number: P3041EC Rev. 2, 02/2013 P3041 P3041 QorIQ Integrated Processor Hardware Specific.
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