Description
Technical Data © Freescale Semiconductor, Inc., 2004.
All rights reserved.
Features
- Reset.
- Separate reset in and reset out signals.
- Six sources of reset: Power-on reset (POR), External, Software, Watchdog, PLL loss of clock, PLL loss of lock.
- Status flag indication of source of last reset.
- General Purpose I/O interface.
- Up to 61 bits of general purpose I/O.
- Bit manipulation supported via set/clear functions.
- Unused peripheral pins may be used as extra GPIO JTAG support for system level board testing.