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CS91 - Standard cell array

Description

The CS91 series 0.11 µm CMOS standard cell is a line of highly integrated CMOS ASICs featuring high speed and low power consumption.

Features

  • Technology.
  • : 0.11 µm silicon-gate CMOS, 5- to 8-layer wiring (Copper is used as wire material. ) , Low-K (2.7) Inter-layer material (Inter-layer material that has low permittivity) Support for high speed, high integration, low leak internal cell set. Capable of incorporating on the same chip. Supply voltage : +1.2 V ± 0.1 V (sta.

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    www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS06-20208-3E Semicustom CMOS Standard cell array CS91 Series ■ DESCRIPTION The CS91 series 0.11 µm CMOS standard cell is a line of highly integrated CMOS ASICs featuring high speed and low power consumption. This series incorporates up to 48 million gates which have a gate delay time of 16 ps, resulting in both integration and speed about three times higher than conventional products. ■ FEATURES • Technology • • • • • • • • • • • • • • • • : 0.11 µm silicon-gate CMOS, 5- to 8-layer wiring (Copper is used as wire material.) , Low-K (2.7) Inter-layer material (Inter-layer material that has low permittivity) Support for high speed, high integration, low leak internal cell set. Capable of incorporating on the same chip.
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