MB90568 Datasheet | Fujitsu Semiconductor Limited

FUJITSU SEMICONDUCTOR DATA SHEET DS07-13715-3E 16-bit Proprietary Microcontrollers CMOS F2MC-16LX MB90560/565 Series .. MB90561/561A/562/562A/F562/F562B/V560 MB90567/568/F568 s DESCRIPTION The MB90560/565 series is a general-purpose 16-bit microcontroller designed for industrial, OA, and process control applications that require high-speed real-time processing. The device Features a multi-function timer able to output a programmable waveform. The microcontroller instruction set is based on the same AT architecture as the F2MC-8L and F2MC-16L families with additional instructions for high-level languages, extended addressing modes, enhanced signed multiplication and division instructions, and a plete range of bit manipulation instructions. The microcontroller has a 32-bit accumulator for processing long word (32-bit) data. s Features - Clock - Internal oscillator circuit and PLL clock multiplication circuit - Oscillation clock Clock speed selectable from either the machine clock, main clock, or PLL clock. The main clock is the oscillation clock divided into 2 (0.5 MHz to 8 MHz for a 1 MHz to 16 MHz base oscillation) . The PLL clock is the oscillation clock multiplied by one to four (4 MHz to 16 MHz for a 4 MHz base oscillation) . - Minimum instruction execution time : 62.5 ns (for oscillation = 4 MHz, PLL clock setting = × 4, VCC = 5.0 V) - Maximum CPU memory space : 16 MB - 24-bit addressing - Bank addressing (Continued) s PACKAGES 64-pin plastic QFP 64-pin plastic LQFP 64-pin plastic SH-DIP (FPT-64P-M06) (FPT-64P-M09) (DIP-64P-M01) MB90560/565 Series (Continued) - Instruction set - Bit, byte, word, and long word data types - 23 different addressing modes - Enhanced calculation precision using a 32-bit accumulator - Enhanced signed multiplication and division instructions and RETI instruction - Instruction set designed for high level language (C) and multi-tasking - Uses a system stack pointer - Symmetric instruction set and barrel...