MB91248 Key Features
- FR60Lite CPU
- 32-bit RISC, load/store architecture, 5-stage pipeline
- Maximum operating frequency : 32 MHz (Source oscillation is 4 MHz with x8 multiplier
- PLL clock multiplier system)
- 16-bit fixed-length instructions (basic instructions)
- Instruction execution speed : 1 instruction per cycle
- Instruction set optimized for embedded application : Memory-to-memory transfer, bit manipulation, barrel shift instructi
- Instructions adapted for programming C language : Function entry/exit instructions, multiple-register load/store instruc
- Register interlock function : Easier assembler coding enabled
- Built-in multiplier supported at the instruction level Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplicat