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P10C68 - CMOS / SNOS NVSRAM

Key Features

  • I Non-Volatile Data Integrity I 10 year Data Retention in EEPROM I 35ns and 45ns Address and Chip Enable Access Times I 20ns and 25ns Output Enable Access I Unlimited Read and Write to SRAM I Unlimited Recall Cycles from EEPROM I 104 Store Cycles to EEPROM I Automatic Recall on Power up I Automatic Store Timing I Hardware Store Protection I Single 5V ± 10% Operation I Available in Standard Package 28-pin 0.3-inch DIL plastic and ceramic I Commercial and Industrial temperature ranges.

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Datasheet Details

Part number P10C68
Manufacturer GEC Plessey Semiconductors
File Size 176.47 KB
Description CMOS / SNOS NVSRAM
Datasheet download datasheet P10C68 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com P10C68/P11C68 PRELIMINARY INFORMATION DS3600-1.2 September 1992 P10C68/P11C68 (Previously PNC10C68 and PNC11C68) CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM (Supersedes DS3159-1.3, DS3160-1.3, DS3234-1.1, DS3235-1.1) The P10C68 and P11C68 are fast static RAMs (35 and 45 ns) with a non-volatile electically-erasable PROM (EEPROM) cell incorporating in each static memory cell. The SRAM can be read and written an unlimited number of times while independent non-volatile data resides in PROM. On the P10C68 data may easily be transferred from the SRAM to the EEPROM (STORE) and from the EEPROM back to the SRAM ( RECALL) using the NE (bar) pin. The Store and Recall cycles are initiated through software sequences on the P11C68.