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GS8150V18AB-357 Datasheet 1M x 18/ 512K x 36 18Mb Register-Register Late Write SRAM

Manufacturer: GSI Technology

Datasheet Details

Part number GS8150V18AB-357
Manufacturer GSI Technology
File Size 842.40 KB
Description 1M x 18/ 512K x 36 18Mb Register-Register Late Write SRAM
Download GS8150V18AB-357 Download (PDF)

General Description

250 MHz–357 MHz 1.8 V VDD 1.5 V or 1.8 V HSTL I/O Because GS8150V18/36A are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.

Write cycles are internally selftimed and initiated by the rising edge of the clock input.

This

Overview

Product Preview GS8150V18/36AB-357/333/300/250 www.DataSheet4U.

Key Features

  • Register-Register Late Write mode, Pipelined Read mode.
  • 1.8 V +150/.
  • 100 mV core power supply.
  • 1.5 V or 1.8 V HSTL Interface.
  • ZQ controlled programmable output drivers.
  • Dual Cycle Deselect.
  • Fully coherent read and write pipelines.
  • Byte write operation (9-bit bytes).
  • Differential HSTL clock inputs, K and K.
  • Asynchronous output enable.
  • Sleep mode via ZZ.
  • IEEE 1149.1 JTAG-compliant Serial Boun.