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GS8160V36AT - 1M x 18 512K x 32 512K x 36 18Mb Sync Burst SRAMs

This page provides the datasheet information for the GS8160V36AT, a member of the GS8160V18AT 1M x 18 512K x 32 512K x 36 18Mb Sync Burst SRAMs family.

Description

The GS8160V18/32/36AT is an 18,874,368-bit (16,777,216-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 350 MHz.
  • 150 MHz 1.8 V VDD 1.8 V I/O.
  • FT pin for user-configurable flow through or pipeline operation.
  • Single Cycle Deselect (SCD) operation.
  • 1.8 V +10%/.
  • 10% core power supply.
  • 1.8 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW).

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Datasheet preview – GS8160V36AT

Datasheet Details

Part number GS8160V36AT
Manufacturer GSI Technology
File Size 528.89 KB
Description 1M x 18 512K x 32 512K x 36 18Mb Sync Burst SRAMs
Datasheet download datasheet GS8160V36AT Datasheet
Additional preview pages of the GS8160V36AT datasheet.

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Full PDF Text Transcription

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Preliminary www.DataSheet4U.com GS8160V18/32/36AT-350/333/300/250/200/150 100-Pin TQFP Commercial Temp Industrial Temp Features 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 350 MHz–150 MHz 1.8 V VDD 1.8 V I/O • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect (SCD) operation • 1.8 V +10%/–10% core power supply • 1.8 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating mode pins • Default to Interleaved Pipeline mode • Byte Write (BW) and/or Global Write (GW) operation • Internal self-timed write cycle • Automatic power-down for portable applications • JEDEC-standard 100-lead TQFP package cycles can be initiated with either ADSP or ADSC inputs.
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