Datasheet Details
| Part number | GS8170DW36C-300 |
|---|---|
| Manufacturer | GSI Technology |
| File Size | 673.20 KB |
| Description | (GS8170DW36C / GS8170DW72C) Double Late Write SigmaRAM |
| Datasheet |
 GS8170DW36C-300 Datasheet
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General Description
Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.
Write cycles are internally self-timed and initiated by the rising edge of the clock input.
Key Features
- Double Late Write mode, Pipelined Read mode.
- JEDEC-standard SigmaRAM™ pinout and package.
- 1.8 V +150/.
- 100 mV core power supply.
- 1.8 V CMOS Interface.
- ZQ controlled user-selectable output drive strength.
- Dual Cycle Deselect.
- Burst Read and Write option.
- Fully coherent read and write pipelines.
- Echo Clock outputs track data output drivers.
- Byte write operation (9-bit bytes).
- 2 user-programma.