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GS8182S09BD Datasheet PDF

GSI Technology GS8182S09BD

18Mb Burst of 2 SigmaSIO DDR-II SRAM

Part No. GS8182S09BD
Datasheet GS8182S09BD Download
Manufacturer
GSI Technology
Description 18Mb Burst of 2 SigmaSIO DDR-II SRAM
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GS8182S09BD datasheet page 1 preview

FEATURES

● Simultaneous Read and Write SigmaSIO™ Interface
● JEDEC-standard pinout and package
● Dual Double Data Rate interface
● Byte Write controls sampled at data-in time
● DLL circuitry for wide output data valid window and future frequency scaling
● Burst of 2 Read and Write
● 1.8 V +100/–100 mV core power supply
● 1.5 V or 1.8 V HSTL Interface
● Pipelined read operation
● Fully coherent read and write pipelines
● ZQ mode pin for programmable output drive strength
● IEEE 1149.1 JTAG-compliant Boundary Scan
● Pin-compatible with present 9Mb, 36Mb, and 72Mb and future 144Mb devices
● 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package
● RoHS-compliant 165-bump BGA package available SigmaSIO DDR-II™ Family Overview GS8182S08/09/18/36BD are built in compliance with
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