GSI Technology GS8182T37BGD
The GS8182T19/37BD are built in compliance with the SigmaDDR-II+ SRAM pinout standard for Common I/O synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs.| Part No. | GS8182T37BGD |
|---|---|
| Datasheet | GS8182T37BGD Download |
| Manufacturer |  GSI Technology |
| Description | 18Mb SigmaDDR-II+ Burst of 2 SRAM |
| Buy | Stock & Price |
FEATURES
● 2.0 Clock Latency● Simultaneous Read and Write SigmaDDR-II™ Interface
● Common I/O bus
● JEDEC-standard pinout and package
● Double Data Rate interface
● Byte Write (x36 and x18) function
● Burst of 2 Read and Write
● 1.8 V +100/–100 mV core power supply
● 1.5 V or 1.8 V HSTL Interface
● Pipelined read operation with self-timed Late Write
● Fully coherent read and write pipelines
● ZQ pin for programmable output drive strength
● IEEE 1149.1 JTAG-compliant Boundary Scan
● 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package
● RoHS-compliant 165-bump BGA package available SigmaDDR-II™ Family Overview They are 18,874,368-bit (18Mb) SRAMs. The GS8182T19/37BD S
