GS8256436GD-400 288Mb DCD Sync Burst SRAM
• FT pin for user-configurable flow through or pipeline operation
• Single/Dual Cycle Deselect selectable
• IEEE 1149.1 JTAG-compatible Boundary Scan
• ZQ.
The GS8256418/36 is a 301,989,888-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of .
Image gallery
Download