GS8662S08E-333 - DDR SigmaSIO-II SRAM

Product Overview

GSI Technology

Datasheet Details

Part number	GS8662S08E-333
Manufacturer	GSI Technology
File Size	2.29 MB
Description	DDR SigmaSIO-II SRAM
Datasheet	GS8662S08E-333 Datasheet
Additional preview pages of the GS8662S08E-333 datasheet.

Product details

Description

Table Symbol SA NC R/W NW0 NW1 BW0 BW1 BW0 BW3 K C TMS TDI TCK TDO VREF ZQ K C DOFF LD CQ CQ Dn Qn VDD VDDQ VSS Description Synchronous Address Inputs No Connect Read/Write Contol Pin Synchronous Nybble Writes Synchronous Byte Writes Synchronous Byte Writes Input Clock Output Clock Test Mode Select Test Data Input Test Clock Input Test Data Output HSTL Input Reference Voltage Output Impedance Matching Input Input Clock Output Clock DLL Disable Synchronous Load Pin Output

Features

Simultaneous Read and Write SigmaSIO™ Interface.
JEDEC-standard pinout and package.
Dual Double Data Rate interface.
Byte Write controls sampled at data-in time.
DLL circuitry for wide output data valid window and future frequency scaling.
Burst of 2 Read and Write.
1.8 V +100/.
100 mV core power supply.
1.5 V or 1.8 V HSTL Interface.
Pipelined read operation.
Fully coherent read and write pipelines.

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Published: Apr 28, 2010 |