GSI Technology GS8673ET36BGK
72Mb SigmaDDR-IIIe Burst of 2 ECCRAM
FEATURES
● On-Chip ECC with virtually zero SER● Configurable Read Latency (3.0 or 2.0 cycles)
● Simultaneous Read and Write SigmaDDR-IIIe™ Interface
● Common I/O Bus
● Double Data Rate interface
● Burst of 2 Read and Write
● Pipelined read operation
● Fully coherent Read and Write pipelines
● 1.35V nominal VDD
● 1.2V JESD8-16A BIC-3 Compliant Interface
● 1.5V HSTL Interface
● ZQ pin for programmable output drive impedance
● ZT for programmable input termination impedance
● Configurable Input Termination
● IEEE 1149.1 JTAG-compliant Boundary Scan
● 260-ball, 14 mm x 22 mm, 1 mm ball pitch BGA package –K: 5/6 RoHS-compliant package –GK: 6/6 RoHS-compliant package SigmaDDR-IIIe™ Family Overview SigmaDDR-IIIe ECCRAMs are the Common I/O half of the SigmaQuad-IIIe/SigmaDDR-IIIe family