Description
Initial Release PWM feature documented
Pin R1 (HDATA1) does not require pull-up (See Table 5).
FSADDR7 bootstrap functionality corrected.
Figure 59 clarified.
Character attribute word mapping corrections in Sections 0 and 0.
Figure 1
second EDID EPROM added to clarify the example.
YUV(7:0) incorporate General Purpose Inputs (GPIs).
Section 4.19.1,General Purpose Inputs and Outputs (GPI
Features
- and Analog RGB Input Port - changed SXGA to UXGA. In Analog RGB Input Port, changed frequency to 60Hz. In UltraReliable DVI Receiver, changed frequency to 165MHz.
 
- In section 4.3.4, changed range to “10MHz to 162MHz. ”.
 
- In Table 12 changed input clock to 165MHz.
 
- In Table 16, changed θJC rating to 7.8.
 
- In Table 17, made extensive changes to parameters and ratings.
 
- In Table 18, included maximum speed of operation (200MHz) for R_CLK Reference Clock. Ch.