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Gennum Corporation

GS1545 Datasheet Preview

GS1545 Datasheet

HDTV Serial Digital Equalizing Receiver

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FEATURES
• SMPTE 292M compliant
• 1.485 and 1.485/1.001Gb/s operation
• integrated adaptive cable equalizer
• integrated adjustment-free reclocker
• 1:20 serial to parallel conversion
• selectable reclocked serial output
• analog/digital input MUX
• carrier detect
• LOCK detect
• input jitter indicator (IJI)
• cable length indication
• maximum cable length adjust
• 20 bit output
• 74.25MHz or 74.25/1.001MHz clock output
• single +5.0V power supply
• minimal component count for HD SDI receive
solutions
APPLICATIONS
SMPTE 292M Serial Digital Interfaces for Video Cameras,
Camcorders, VTR's, Signal Generators, Portable
Equipment, and NLE's.
HD-LINXGS1545
HDTV Serial Digital
Equalizing Receiver
PRELIMINARY DATA SHEET
DESCRIPTION
The GS1545 is a high performance integrated Equalizing
Receiver designed for HDTV component signals,
conforming to the SMPTE 292M standard. The GS1545
includes adjustment free, adaptive cable equalization, clock
and data recovery, and serial to parallel conversion.
The Equalizer stage features DC restoration for immunity to
the DC content in pathological test patterns.
The Clock and Data Recovery stage was designed to
automatically recover the embedded clock signal and
retime the data from SMPTE 292M compliant digital video
signals. There is also a selectable reclocked serial data
output and the ability to bypass the reclocker stage.
A unique feature, Input Jitter Indicator (IJI), is included for
robust system design. This feature is used to indicate
excessive input jitter before the chip mutes the outputs.
The Serial to Parallel conversion stage provides 1:20 S/P
conversion
The GS1545 uses the GO1515 external VCO connected to
the internal PLL circuitry to achieve ultra low noise PLL
performance.
ORDERING INFORMATION
PART NUMBER
PACKAGE
GS1545-CQR
128 pin MQFP
TEMPERATURE
0°C to 70°C
SDOint
SDI
SDI
EQUALIZER
CORE
SDOint ANALOG-
DIGITAL
MUX &
RECLOCKER
CORE
BUFFER
S/P CONVERTER
BUFFER2
DDI DDI_VTT DDI
(opt)
A/D SDO_EN
SIMPLIFIED BLOCK DIAGRAM
DATA_OUT[19:0]
PCLK_OUT
SDO
SDO
Revision Date: August 2000
Document No. 522 - 28 - 00
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com




Gennum Corporation

GS1545 Datasheet Preview

GS1545 Datasheet

HDTV Serial Digital Equalizing Receiver

No Preview Available !

CD CLI
GO1515
LFA LFS LFS PLCAP PLCAP IJI
MCLADJ
CABLE LENGTH INDICATOR
MAXIMUM CABLE LENGTH ADJUST
CARRIER DETECT
CHARGE
PUMP
PHASE
LOCK
LOGIC
PLL_LOCK
SDI EQ
DC
SDI CORE RESTORE
BUFFER1
VCO
PHASE
DETECTOR
AGC
EQUALIZER CORE
SDOint+
SDOint-
ANALOG-
DIGITAL
MUX &
BUFFER
MUTE
RECLOCKER CORE
S/P CONVERTER
CORE
BUFFER2
DDI DDI_VTT DDI
(opt)
A/D
BYPASS SDO_EN
FUNCTIONAL BLOCK DIAGRAM
PCLK_OUT
DATA_OUT[19:0]
SDO
SDO
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise shown.
PARAMETER
Supply Voltage (VS)
Input Voltage Range (any input)
Operating Temperature Range
Storage Temperature Range
Power Dissipation (VCC = 5.25V)
Lead Temperature (soldering 10 seconds)
Input ESD Voltage
Junction Temperature
VALUE
5.5V
VEE 0.5 < VIN < VCC+ 0.5
0°C TA 70°C
-40°C TS 150°C
2.1W
260°C
TBD
125°C
GENNUM CORPORATION
2
522 - 28 - 00


Part Number GS1545
Description HDTV Serial Digital Equalizing Receiver
Maker Gennum Corporation
Total Page 19 Pages
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