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CD74HC393 - Dual 4-Stage Binary Counter

This page provides the datasheet information for the CD74HC393, a member of the CD74HCT393E Dual 4-Stage Binary Counter family.

Description

Fully Static Operation Buffered Inputs Common Reset Negative-Edge Clocking TTAyp=ic2a5lofCMAX = 60 MHz at VCC = 5V, CL = 15pF, Fanout (Over Temperature Range) - Standard Outputs 10 LSTTL Loads - Bus Driver Output

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Datasheet preview – CD74HC393

Datasheet Details

Part number CD74HC393
Manufacturer Harris
File Size 31.70 KB
Description Dual 4-Stage Binary Counter
Datasheet download datasheet CD74HC393 Datasheet
Additional preview pages of the CD74HC393 datasheet.

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Full PDF Text Transcription

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Semiconductor September 1997 CD74HC393, CD74HCT393 High Speed CMOS Logic Dual 4 -Stage Binary Counter Features Description • Fully Static Operation • Buffered Inputs • Common Reset • Negative-Edge Clocking • TTAyp=ic2a5lofCMAX = 60 MHz at VCC = 5V, CL = 15pF, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.
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