82C37A - CMOS High Performance Programmable DMA Controller
Harris Corporation
Download the 82C37A datasheet PDF.
This datasheet also covers the 82C37 variant, as both devices belong to the same cmos high performance programmable dma controller family and are provided as variant models within a single manufacturer datasheet.
General Description
Compatible with the NMOS 8237A
Four Independent Maskable Channels with Autoinitialization Capability
Cascadable to any Number of Channels
High Speed Data Transfers: - Up to 4MBytes/sec with 8MHz Clock - Up to 6.25MBytes/sec with 12.5MHz Clock
Memory
Full PDF Text Transcription for 82C37A (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
82C37A. For precise diagrams, and layout, please refer to the original PDF.
SEMICONDUCTOR 82C37A March 1997 CMOS High Performance Programmable DMA Controller Features Description • Compatible with the NMOS 8237A • Four Independent Maskable Channe...
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on • Compatible with the NMOS 8237A • Four Independent Maskable Channels with Autoinitialization Capability • Cascadable to any Number of Channels • High Speed Data Transfers: - Up to 4MBytes/sec with 8MHz Clock - Up to 6.25MBytes/sec with 12.5MHz Clock • Memory-to-Memory Transfers • Static CMOS Design Permits Low Power Operation - ICCSB = 10µA Maximum - ICCOP = 2mA/MHz Maximum • Fully TTL/CMOS Compatible • Internal Registers may be Read from Software The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Harris’ advanced 2 micron CMOS process.
82C37A Datasheet
