HY-510N Datasheet | HawYang

DESCRIPTION The HY510N provides protection circuits, power good output (PGO), fault protection latch (FPL_N), and a protection detector function (PDON_N) control. It can minimize external ponents of switching power supply systems in personal puter. The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is 2.4 ms delay time for PDON_N turn off FPL_N. When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue. FEATURES - The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. - The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. - Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output. - 75 ms time delay for UVD. - 300 ms time delay for PGO. - 38 ms for PDON_N input signal De- bounce. - 73 us for internal signal De- glitches. - 2.4 ms time delay for PDON_N turn-off FPL_N. - ESD voltage up to 4000V as tested under MIL- STD- 883D, Method 3015.7. PIN ASSIGNMENT AND PACKAGE TYPE PGI 1 GND 2 FPL_N 3 PDON_N 4 V5 V33 ORDERING INFORMATION PACKAGE 8- Pin Plastic DIP HY510N- N080WT Lead- Free Pb HY510N- N080WT Pb The Top-Side Marking would be added a dot 8- Pin Plastic SOP HY510N- S080WT HY510N- S080WT Pb in the right side for lead-free package. PIN DESCRIPTION Pin No. Pin Name TYPE Description 1 PGI I power good input pin 2 GND P Ground 3 FPL_N O fault protection latch output pin(open drain output) 4 PDON_N I protection detector function ON/OFF control input pin 5 V33 I 3.3V input...