74HC95
Description
This 4-bit register features parallel and serial inputs, parallel outputs, mode control, and two clock inputs. The register has three mode operation:
- Parallel (broadside) load
- Shift right (the direction Q A toward QD)
- Shift left (the direction QD toward QA) Parallel loading is acplished by applying the four bits of data and taking the mode conrol input high. The data is loaded into the associated flip-flops and appears at the outputs after the high-to-low transition of the clock-2 input. During loading, the entry of serial data is inhibited. Shift right is acplished on the high-to-low transition of clock-1 when the mode control is low; shift left is acplished on the high-tolow transition of clock-2 when the mode control is high by connecting the output of each flip-flop (Q D to input C, etc.) and serial data is entered at input D. The clock input may be applied monly to clock-1 and clock-2 if both modes can be clocked from the same source. Changes at the mode control...
