Figure 2.16(2) H8/3801 Memory Map Figure 2.16(3) H8/3800 Memory Map Table 3.2 Interrupt Sources and Their Priorities Table 3.3 Interrupt Control Registers Description Des.

Description of time specification amended Figure amended Figure amended Amended Initial values amended 1. IRQ edge select register (IEGR) Bits 4 to 2 amended 62 63 to 65 65 67, 68 3.3.5 Interrupt Operations 3.4.2 Notes on Rewriting Port Mode Registe.

HD64404

HD64410F16

HD64413A

HD64413AQ2SD

HD6445

HD64460

HD64465

HD64473837

HD6402

HD6409

HD641180X

HD6412320

HD6412321