Figure 2.16(2) H8/3801 Memory Map Figure 2.16(3) H8/3800 Memory Map Table 3.2 Interrupt Sources and Their Priorities Table 3.3 Interrupt Control Registers Description Des.

Description of time specification amended Figure amended Figure amended Amended Initial values amended 1. IRQ edge select register (IEGR) Bits 4 to 2 amended 62 63 to 65 65 67, 68 3.3.5 Interrupt Operations 3.4.2 Notes on Rewriting Port Mode Registe.

HD6473802

HD6473802FP

HD6473802H

HD6473827

HD6473834

HD6473867

HD6473882

HD6473887

HD6473032F

HD6473048

HD6473258

HD6473258F

HD6473278