HD74HC4543
Description
This circuit contains a 4-bit latch, BCD-to-7 segment decoder, and 7 outpt drivers. Data on the input pins flow through to the output when the Latch Disable (LE) is high and is latched on the high to low transition of the LE input.
Key Features
- High Speed Operation: tpd (A, B, C, D to a - g) = 33 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
