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* High Speed Operation: tpd (Clock to QA) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC =.

This circuit contains eight master-slave flip-flops and additional gating to implement two individual 4-bit decade counters. Each decade counter has individual clock, clear and set-to-9 inputs. BCD count sequences of any length up to divide-by-100 ma.

HD74HC4017

HD74HC4020

HD74HC4022

HD74HC4024

HD74HC4040

HD74HC4051

HD74HC4052

HD74HC4053

HD74HC4060

HD74HC4066

HD74HC42

HD74HC423A

HD74HC442