The HI-6120 and HI-6121 provide a complete, integrated, 3.3V MIL-STD-1553 Remote Terminal in a monolithic silicon gate CMOS device.
Key Features
Fully integrated 3.3V Remote Terminal meets all requirements for MIL-STD-1553B Notice 2.
Four data buffer modes for subaddress transmit and receive commands. Data buffer modes are independently selectable for transmit and receive commands on each subaddress.
Simplified mode code command handling.
Integral 16-bit Time-Tag counter has programmable options for clock, interrupts and auto-synchronization.
Message information and time-tag words are stored.
Full PDF Text Transcription for HI-6120 (Reference)
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HI-6120. For precise diagrams, and layout, please refer to the original PDF.
November, 2015 HI-6120 Parallel Bus Interface and HI-6121 Serial Peripheral Interface (SPI) MIL-STD-1553 Remote Terminal ICs GENERAL DESCRIPTION The HI-6120 and HI-6121 p...
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1553 Remote Terminal ICs GENERAL DESCRIPTION The HI-6120 and HI-6121 provide a complete, integrated, 3.3V MIL-STD-1553 Remote Terminal in a monolithic silicon gate CMOS device. Two host interface options are offered: The HI-6120 uses a 16-bit parallel host bus interface for access to registers and RAM and is offered in a 100-pin plastic quad flat pack (PQFP). The HI-6121 has a 4-wire SPI (Serial Peripheral Interface) host connection and comes in a reduced pin count 52-pin PQFP or 9mm x 9mm 64-pin QFN. Both devices handle all aspects of the MIL-STD-1553 protocol, including message encoding, decoding, error detection, illega
HI-6120 Datasheet
