H55S1262EFP-60E - 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O

SK Hynix

Datasheet Details

Part number	H55S1262EFP-60E
Manufacturer	SK Hynix
File Size	796.95 KB
Description	128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O
Datasheet	H55S1262EFP-60E Datasheet

General Description

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Overview

www.DataSheet4U.com 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O Specification of 128M (8Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 2,097,152 x16 This document is a general.

Key Features

Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK).

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H55S1222EFP-75E	128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O
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