H5MS1222EFP datasheet, sdram equivalent, Hynix Semiconductor

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H5MS1222EFP Features and benefits

SUMMARY Mobile DDR SDRAM - Double data rate architecture: two data transfer per clock cycle Mobile DDR SDRAM INTERFACE - x32 bus width: HY5MS5B2ALFP - Multiplexed Address.

H5MS1222EFP Application

which use the battery such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-n.

H5MS1222EFP Description

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.0 / Jun. 2008 1 www.DataSheet4U.net Mobile DDR SDRAM 128Mbit (4M x 32bit) H5MS1222EFP Series Doc.

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