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HY5S5B6GLFP-S - 256Mbit (16Mx16bit) Mobile SDR Memory

Download the HY5S5B6GLFP-S datasheet PDF. This datasheet also covers the HY5S5B6GLF-6 variant, as both devices belong to the same 256mbit (16mx16bit) mobile sdr memory family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (HY5S5B6GLF-6_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Overview

256MBit MOBILE SDR SDRAMs based on 4M x 4Bank x16 I/O Specification of 256M (16Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,194,304 x16 This document is a general.

Key Features

  • Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK).