HYMD512M646BFS8-M Datasheet | SK Hynix

128Mx64 bits Unbuffered DDR SO-DIMM HYMD512M646B(L)FS8-J/M/K/H/L Document Title 128Mx64 bits Unbuffered DDR SO-DIMM Revision History No. 0.1 History Initial Draft Draft Date Jan. 2004 Remark .. This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.1 / Jan. 2004 1 128Mx64 bits Unbuffered DDR SO-DIMM HYMD512M646B(L)FS8-J/M/K/H/L DESCRIPTION .. Hynix HYMD512M646B(L)FS8-J/M/K/H/L series is unbuffered 200-pin double data rate Synchronous DRAM Small Outline Dual In-Line Memory Modules (SO-DIMMs) which are organized as 128Mx64 high-speed memory arrays. Hynix HYMD512M646B(L)FS8-J/M/K/H/L series consists of eight 128Mx8 DDR SDRAM in FBGA packages on a 200pin glass-epoxy substrate. Hynix HYMD512M646B(L)FS8-J/M/K/H/L series provide a high performance 8-byte interface in 67.60mm X 31.75mm form factor of industry standard. It is suitable for easy interchange and addition. Hynix HYMD512M646B(L)FS8-J/M/K/H/L series is designed for high speed of up to 166MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are patible with SSTL_2. High speed frequencies, programmable latencies and burst lengths allow variety of device operation in high performance memory system. Hynix HYMD512M646B(L)FS8-J/M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity...