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HYMP112S64MP8 Datasheet Ddr2 Sdram So-dimm

Manufacturer: SK Hynix

Overview: www.DataSheet4U.com DDR2 SDRAM SO-DIMM HYMP112S64(L)MP8 Revision History No. 0.1 History 1) Defined target spec.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Key Features

  • 1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on 128Mx8 DDR2 DDP SDRAMs JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination) Fully differential clock operations (CK & /CK) Programmable CAS Latency 3 / 4 /5 supported.
  • Programmable Burst Lengt.

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