IP1718LF Datasheet | IC Plus

Features Embeds 1.5 Mb packet buffer Handles up to 4K MAC address entries Supports non-blocking wire speed operation Provides 16-port SS-SMII and 2-port MII Supports 2 ports selectable normal MII, reverse MII All I/O signals can operate at 3.3V or 1.8V. Supports up to 18 port based VLAN group Supports 256 levels of data rate control Captures BPDU, IGMP and OSPF …packet and forward to the CPU port. Suppress/enable per port address learning. Embeds two levels of priority queues for VLAN tag, physical port and IP Differentiated Service. Supports flexible port trunking configuration: up to 3 groups and up to 4 ports for each group Embeds an internal regulator controller to simplify the system design. Power supply: 1.8V for core logic; optional 3.3V or 1.8V for I/O. 128 pin QFP package Adjustable I/O driving capability Support packet length up to 1536 Bytes Spanning Tree state support. Supports 3 kinds of port mirrioring methods HOL blocking prevention Only one 25MHz crystal needed Broadcast storm control support Programmable MAC address table through 2 serial pins. Support Lead Free package (Please refer to the Order Information) General Description Supporting 16-port SS-SMII, 2-port MII and various advanced features , the IP1718 LF fits both the office switch and the ETTH( Ethernet to the Home) application. The IP1718 LF embeds internal SSRAM for the use of the packet buffer and the MAC address table. Besides the traditional switch functions, the IP1718 LF provides the easy-to-design solution, fitting the requirement of most switch application. The IP1718 LF also supports some features which can simplify the customer’s design from the viewpoint of the system. The embedded regulator controller can reduce the ponent number on the system board. The web management can be easily acplished by adding an external CPU with protocol stack. All the I/O pins can operate at 3.3V or 1.8V, providing more design flexibility for power supply distribution. The IP1718 LF embeds 1.5Mb...