* High-speed access time: 12, 15, 20, 25 ns
* Low active power: 600 mW (typical)
* Low standby power: 500 µW (typical) CMOS standby
* Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications
* Fully static operation: no clock or ref
IC61C1024 Datasheet (197.52 KB)
IC61C1024
ICS
197.52 KB
128k x 8 high-speed cmos static ram.
IC61C1024 IC61C1024L Document Title 128K x 8 High-Speed SRAM Revision History Revision No 0A 0B History Initial Draft Revise typo on page 6 and page.
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