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ICS844001-21 Datasheet Preview

ICS844001-21 Datasheet

CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

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PRELIMINARY
FEMTOCLOCKS™ CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS844001-21 is a a highly versatile, low
ICS phase noise LVDS Synthesizer which can generate
HiPerClockS™ l o w j i t t e r r e fe r e n c e c l o ck s fo r a va r i e t y o f
communications applications and is a member of
the HiPerClocksTM family of high performance clock
solutions from IDT. The dual crystal interface allows the
synthesizer to support up to two communications standards in
a given application (i.e. 1GB Ethernet with a 25MHz crystal
and 1Gb Fibre Channel using a 25.5625MHz crystal). The rms
phase jitter performance is typically less than 1ps, thus making
the device acceptable for use in demanding applications such
as OC48 SONET and 10Gb Ethernet. The ICS844001-21 is
packaged in a small 24-pin TSSOP package.
ICS844001-21
FEATURES
• One differential LVDS output pair and
one LVCMOS reference output
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• VCO range: 560MHz - 700MHz
• Supports the following applications:
SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV
• RMS phase jitter @ 622.08MHz (12kHz - 20MHz):
0.92ps (typical)
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
N2:N0
3
SEL0 Pulldown
SEL1 Pulldown
XTAL_IN0
XTAL_OUT0
OSC
XTAL_IN1
XTAL_OUT1
OSC
REF_CLK Pulldown
00
01
10
11
MR Pulldown
M2:M0
3
REF_OE Pulldown
11
Phase
Detector
VCO
M
000 ÷18
001 ÷22
010 ÷24
011 ÷25
100 ÷32 (default)
101 ÷40
110 ÷40
111 ÷40
10
01
00
N
000 ÷1
001 ÷2
010 ÷3
011 ÷4 (default)
100 ÷5
101 ÷6
110 ÷8
111 ÷10
PIN ASSIGNMENT
VDDO_CMOS
N0
N1
N2
VDDO_LVDS
Q0
Q nQ0
nQ GND
VDDA
VDD
XTAL_OUT1
XTAL_IN1
1
2
3
4
5
6
7
8
9
10
11
12
24 REF_OUT
23 GND
22 REF_OE
21 M2
20 M1
19 M0
18 MR
17 SEL1
16 SEL0
15 REF_CLK
14 XTAL_IN0
13 XTAL_OUT0
ICS844001-21
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
REF_OUT
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT/ ICSINSERT PRODUCT NAME
1 ICS844001AG-21 REV. A SEPTEMBER 14, 2007




ICS

ICS844001-21 Datasheet Preview

ICS844001-21 Datasheet

CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

No Preview Available !

ICS844001-21
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VDDO_CMOS
Power
Output supply pin for LVCMOS output.
2, 3
N0, N1
Input Pullup Output divider select pins. Default ÷4.
4 N2 Input Pulldown LVCMOS/LVTTL interface levels.
5
VDDO_LVDS
Power
6, 7
Q, nQ
Ouput
Output supply pin for LVDS outputs.
Differential output pair. LVDS interface levels.
8, 23
GND
Power
Power supply ground.
9
VDDA
Power
10 VDD Power
11
12
XTAL_OUT1,
XTAL_IN1
Input
13
14
XTAL_OUT0,
XTAL_IN0
Input
Analog supply pin.
Core supply pin.
Parallel resonant crystal interface. XTAL_OUT1 is the output,
XTAL_IN1 is the input.
Parallel resonant crystal interface. XTAL_OUT0 is the output,
XTAL_IN0 is the input.
15 REF_CLK Input Pulldown Reference clock input. LVCMOS/LVTTL interface levels.
16, 17 SEL0, SEL1 Input Pulldown MUX select pins. LVCMOS/LVTTL interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are
18
MR
Input
Pulldown
reset causing the true output Q to go low and the inverted output nQ to
go high. When logic LOW, the internal dividers and the outputs are
enabled. LVCMOS/LVTTL interface levels.
19, 20
21
22
M0, M1
M2
REF_OE
Input
Input
Input
Pulldown Feedback divider select pins. Default ÷32.
Pullup LVCMOS/LVTTL interface levels.
Pulldown
Reference clock output enable. Default Low.
LVCMOS/LVTTL interface levels.
24 REF_OUT Output
Reference clock output. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLDOWN
RPULLUP
Rout
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Output Impedance REF_OUT
Test Conditions
Minimum
Typical
4
51
51
7
Maximum
Units
pF
kΩ
kΩ
Ω
IDT/ ICSINSERT PRODUCT NAME
2 ICS844001AG-21 REV. A SEPTEMBER 14, 2007


Part Number ICS844001-21
Description CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
Maker ICS
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