Datasheet Details
| Part number | ICS844101I-312 |
|---|---|
| Manufacturer | ICS |
| File Size | 199.04 KB |
| Description | CRYSTAL-TO-LVDS 312.5MHZ FREQUENCY MARGINING SYNTHESIZER |
| Datasheet |
 ICS844101I-312 Datasheet
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General Description
The ICS844101I-312 is a low phase-noise frequency margining synthesizer and is a memHiPerClockS™ ber of the HiPerClockS™ family of high performance clock solutions from ICS.
In the default mode, the device nominally generates a 312.5MHz LVDS output clock signal from a 25MHz crystal input.
Key Features
- One 312.5MHz nominal LVDS output.
- Selectable crystal oscillator interface designed for 25MHz, 18pF parallel resonant crystal or LVCMOS single-ended input.
- Output frequency can be varied in 2% steps ± from nominal.
- VCO range: 560MHz - 690MHz.
- RMS phase jitter @ 312.5MHz, using a 25MHz crystal (1.875MHz-20MHz): 0.52ps (typical).
- Output supply modes Core/Output 3.3V/3.3V 3.3V/2.5V.
- -40°C to 85°C ambient operating temperature.