IC62LV1008L Datasheet | ICSI

FEATURES - Access times of 55, 70, 100 ns - CMOS Low power operation: ICC=15m A (typical)- operation ISB2=2µA (typical)- standby - Low data retention voltage: 1.5V (min.) - Output Enable (OE) and Two Chip Enables (CE1, CE2) inputs for ease in applications - TTL patible inputs and outputs - Fully static operation: - No clock or refresh reguired - Single 2.7V-3.6V power supply - Wafer level burn in test mode - Available in the know good die form and 48-pin 8- 10mm TF-BGA - Typical values are measured at VCC=3.0V, TA=25°C Preliminary DESCRIPTION The ICSI IC62LV1008L and IC62LV1008LL is a low voltage, ICSI's low voltage, six transistor (6T), CMOS technology. The 1,048,576 words by 8 bits, CMOS SRAM. It is fabricated using device is targeted to satisfy the demands of the state-of-the-art technologies such as cell phones and pagers. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Additionally, easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable ( WE) controls both writing and reading of the memory. The IC62LV1008L and IC62LV1008LL are available in know good die form and 48-pin 8- 10mm TF-BGA. FUNCTIONAL BLOCK DIAGRAM A0-A19 DECODER 1024K x 8 MEMORY ARRAY VCC GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE1 CE2 OE WE ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc. CONTROL CIRCUIT Integrated Circuit Solution Inc. LPSR015-0A 1/3/2001 IC62LV1008L IC62LV1008LL PIN CONFIGURATIONS 48-Pin 8- 10mm TF-BGA (TOP View) 1 A B C D E F G H NC NC I/O0 GND Vcc I/O3 NC A18 OE NC NC I/O1 I/O2 NC NC A8 A0 A3 A5 A17 Vcc A14 A12 A9 A1 A4 A6 A7 A16 A15 A13...