ICS8530I-01 Key Features
- (16) differential 3.3V LVPECL outputs
- CLK, nCLK input pair
- CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
- Maximum output frequency: 500MHz
- Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input
- Output skew: 50ps (typical)
- Part-to-part skew: 100ps (typical)
- Additive phase jitter, RMS @ 106.25MHz: 0.022ps (typical) @ 25°C
- 3.3V output operating supply
- 40°C to 85°C ambient operating temperature
