ICS853111-01 datasheet, buffer equivalent, ICST

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Features and benefits

* 9 differential 3.3V LVPECL / ECL outputs
* 1 differential LVPECL input pair
* PLCK, nPLCK pair can accept the following differential input levels: LVPECL, L.

Application

demanding well defined performance and repeatability. ICS BLOCK DIAGRAM PCLK nPCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 .

Description

The ICS853111-01 is a low skew, high performance 1-to-9 Differential-to-3.3V LVPECL/ECL HiPerClockS™ Fa n o u t B u f fe r a n d a m e m b e r o f t h e HiPerClock S ™ family of High Performance Clock Solutions from ICS. The PCLK, nPCLK pair can acce.

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