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MK9173-01 Datasheet Preview

MK9173-01 Datasheet

(MK9173-01/-15) Video Genlock PLL

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Integrated
Circuit
Systems, Inc.
MK9173-01
MK9173-15
Video Genlock PLL
General Description
The MK9173-01 and MK9173-15 provide the analog PLL
circuit blocks to implement a frequency multiplier. Because
the device is configured to use an external divider in the PLL
clock feedback path, a large divider can be used to result in a
large frequency multiplication ratio. This is useful when using
a low frequency input clock to generate a high frequency
output clock. The MK9173-01/15 contains a phase detector,
charge pump, loop filter, and voltage-controlled oscillator
(VCO). The ICS674-01 can be used as the external feedback
divider.
A common application of the MK9173-01/-15 is the
implementation of a video genlock circuit. Because of this,
the MK9173-01/-15 inputs operate on the negative-going
clock edge.
Features
• Designed to replace the AV9173 in most applications
• Phase-detector/VCO circuit block
• Ideal for genlock system
• Reference clock range 12 kHz to 1M Hz for full
output clock range
• Output clock range 1.25 to 75 M Hz (-01), 0.625 to
37.5 MHz (-15), see Table 1 for conditions
• On-chip loop filter
• Single 5 volt power supply
• Low power CMOS technology
• Small 8-pin SOIC package
The MK9173-01/15 is pin and function compatible to the
AV9173-01/15. Please refer to page 4 regarding performance
differences. For new video genlock designs, please refer to the
ICS673-01, ICS1522 or ICS1523.
Block Diagram
Integrated Circuit Systems, Incorporated • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com
MDS 9173-01/15 B
121400




ICST

MK9173-01 Datasheet Preview

MK9173-01 Datasheet

(MK9173-01/-15) Video Genlock PLL

No Preview Available !

MK9173- 01
MK9173-15
Pin Configuration
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
6
7
8
PIN NAME
FBIN
IN
GND
FS0
OE
CLK1
VDD
CLK2
TYPE
Input
Input
Input
Input
Output
Output
DESCRIPTION
Feedback Input
Input for reference sync pulse
Ground
Frequency Select 0 input
Output Enable
Clock Output 1
Power Supply (+5V)
Clock Output 2 (Divided-by-2 from Clock 1)
Table 1: Allowable Input Frequency to Output Frequency (Outputs in MHz)MK9173-01
(MK9173-15 outputs run at exactly 1/2 the MK9173-01 frequencies)
fIN (kHz)
12 fIN 14 kHz
14 < fIN 17 kHz
17 < fIN 30 kHz
30 < fIN 35 kHz
35 < fIN 1000 kHz
fOUT for FS = 0 (MHz)
CLK1 Output
CLK2 Output
44.0 to 75
22.0 to 37.5
30.0 to 75
15.0 to 37.5
25.0 to 75
12.5 to 37.5
15.0 to 75
7.5 to 37.5
10.0 to 75
5.0 to 37.5
fOUT for FS = 1 (MHz)
CLK1 Output
CLK2 Output
11.0 to 18.75
5.5 to 9.375
7.5 to 18.75
3.75 to 9.375
6.25 to 18.75
3.125 to 9.375
3.75 to 18.75
1.875 to 9.375
2.5 to 18.75
1.25 to 9.375
Integrated Circuit Systems, Incorporated • 525 Race Street •San Jose • CA• 95126 • (408) 295-9800 tel • www.icst.com
2


Part Number MK9173-01
Description (MK9173-01/-15) Video Genlock PLL
Maker ICST
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