8P34S2102 Description
The 8P34S2102 is a high-performance, low-power, differential dual 1:2 LVDS output, 1.8V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available.
8P34S2102 Key Features
- Dual 1:2 low skew, low additive jitter LVDS fanout buffers
- Matched AC characteristics across both channels
- High isolation between channels
- Low power consumption
- Both differential CLKA, nCLKA and CLKB, nCLKB inputs accept LVDS, LVPECL and single-ended LVCMOS levels
- Maximum input clock frequency: 2GHz
- Output amplitudes: 350mV, 500mV (selectable)
- Output bank skew: 8ps typical
- Output skew: 10ps typical
- Low additive phase jitter, RMS: 45fs typical (fREF = 156.25MHz, 12kHz