8P79818 Datasheet Programmable Low Additive Jitter 2:8 Buffer

Manufacturer: IDT

8P79818 programmable low additive jitter 2:8 buffer by IDT - Datasheet Preview

Datasheet Details

Part number	8P79818
Manufacturer	IDT
File Size	863.39 KB
Description	Programmable Low Additive Jitter 2:8 Buffer
Download	8P79818 Download (PDF)

General Description

The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it.

The 8P79818 supports two output banks, each with its own divider and power supply.

All outputs in one bank would generate the same output frequency, but each output can be individually controlled for output type, output enable or even powered-off.

Overview

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs.

Key Features

Two differential inputs support LVPECL, LVDS, HCSL or LVCMOS reference clocks.
Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz.
Select which of the two input clocks is to be used as the reference clock for which divider via pin or register selection.
Switchover will not generate any runt clock pulses on the output.
Generates eight differential outputs or eight LVCMOS outputs, Bank A only.
Differential outputs selectable as LVPECL, LVDS, CML.

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