ICS180-53 Datasheet PDF - IDT LOW EMI CLOCK GENERATOR Specs

ICS180-53 - LOW EMI CLOCK GENERATOR

Datasheet Summary

Description

The ICS180-53 generates a low EMI output clock from a clock or crystal input.

The device uses IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB.

Features

Pin and function compatible to Cypress W180-53.
Packaged in 8-pin SOIC.
Provides a spread spectrum output clock.
Accepts a clock input and provides same frequency dithered output.
Input frequency of 15 to 28 MHz.
Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics.
Spread percentage selection for +/-0.625% and.

Datasheet Details

Part number	ICS180-53
Manufacturer	IDT
File Size	130.72 KB
Description	LOW EMI CLOCK GENERATOR
Datasheet	ICS180-53 Datasheet
Additional preview pages of the ICS180-53 datasheet.

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Full PDF Text Transcription

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DATASHEET LOW EMI CLOCK GENERATOR ICS180-53 Description The ICS180-53 generates a low EMI output clock from a clock or crystal input. The device uses IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The ICS180-53 offers center spread selection of +/-0.625% and +/-1.875%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.

Published: Apr 5, 2019 |