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ICS670-03 - LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Description

The ICS670-03 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques.

It is identical to the ICS670-01, but with an increased maximum output frequency of 210 MHz.

Features

  • Packaged in 16-pin SOIC.
  • Pb (lead) free package, RoHS compliant.
  • Clock inputs from 5 to 210 MHz (see page 2).
  • Patented PLL with low phase noise.
  • Output clocks up to 210 MHz at 3.3V.
  • 15 selectable on-chip multipliers.
  • Power down mode available.
  • Low phase noise: -124 dBc/Hz at 10 kHz.
  • Output enable function tri-states outputs.
  • Low jitter 15 ps one sigma.
  • Advanced, low power, sub-micron CMOS process.

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Datasheet Details

Part number ICS670-03
Manufacturer IDT
File Size 142.83 KB
Description LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER
Datasheet download datasheet ICS670-03 Datasheet
Additional preview pages of the ICS670-03 datasheet.

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Full PDF Text Transcription

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LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER DATASHEET ICS670-03 Description The ICS670-03 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-01, but with an increased maximum output frequency of 210 MHz. Part of IDT’s ClockBlocksTM family, the part’s zero delay feature means that the rising edge of the input clock aligns with the rising edges of the outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin.
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