ICS9UMS9610 Datasheet PC MAIN CLOCK

Manufacturer: IDT

Datasheet Details

PIN # PIN NAME TYPE DESCRIPTION 1 CPU_STOP#_3.3 IN This active-low input stops all CPU clocks that are set to be stoppable.

This level sensitive strobe determines when latch inputs are valid and are 2 CLKPWRGD#/PD_3.3 IN ready to be sampled.

When high, this asynchronous input places the device into the power down state.

PC MAIN CLOCK Recommended Application: Poulsbo Based Ultra-Mobile PC (UMPC) -.

3 - CPU low power differential push-pull pairss.
3 - SRC low power differential push-pull pairs.
1 - LCD100 SSCD low power differential push-pull pair.
1 - DOT96 low power differential push-pull pair.
1 - REF, 14.31818MHz, 3.3V SE output Pin Configuration Advance Information ICS9UMS9610 Features/Benefits:.
Supports Dothan ULV CPUs with 100 to 200 MHz CPU outputs.
Dedicated TEST/SEL and TEST/MODE pins saves isolation resistors on p.

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