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Integrated Device Technology Electronic Components Datasheet

IDT39C01D Datasheet

4-Bit CMOS Microprocessor Slice

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MICROSLICETM PRODUCT
FEATURES:
• Low-power
-Icc {max.}
Military - 35mA
Commercial - 30mA
• Fast
-IDT39COIC - meets 2901C speeds
-IDT39COID - 20% speed upgrade
-IDT39COI E - 40% speed upgrade
• Eight-function ALU
-Performs addition, two subtraction operations and five
logic functions on two source operands
• Expandable
-Longer word lengths achieved through cascading any
number of IDT39COls
• Four status flags
-Carry, overflow, negative and zero
• Pin compatible and functionally equivalent to the 2901 A,B,C
• Military product available 100% screened to MIL-STD-883,
Class B
DESCRIPTION:
The IDT39COI Cs are high-speed, cascadable ALUs which can
be used to implement CPUs, peripheral controllers and program-
mable microprocessors. The IDT39C01's microinstruction flexi-
bility allows for easy emulation of most digital computers.
This extremely low-power yet high-speed ALU consists of a
16-word by 4-bit dual-port RAM, a high-speed ALU, and the
required shifting, decoding and multiplexing logic. It is expand-
able in 4-bit increments, contains a flag output along with three-
state data outputs, and can easily use either a ripple carry or full
lookahead carry. The nine-bit microinstruction word is organized
into three groups of three bits each and selects the ALU destina-
tion register, ALU source operands and the ALU function.
The IDT39COIC is fabricated using CEMOS'·, a single poly,
double metal CMOS technology deSigned for high-performance
and high-reliability.
The IDT39COIC is a pin-compatible, performance-enhanced,
functional replacement for all versions of the 2901.
FUNCTIONAL BLOCK DIAGRAM
RAMo
CLOCK~~~~~b=~~='
BDATA'N
READ ADDRESS
READIWRITE ADDRESS
A ADDRESS
16 ADDRESSABLE
REGISTERS
B ADDRESS
DIRECT DATA'N _ _...........
CARRY IN
OUTPUT ENABLE
MICROSLICE and CEMOS are trademarks of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
@1986 Integrated Device Technology, Inc.
3-1
B-FUNCTION ALU
g
P
Cn+4
F3 (SIGN)
OVERFLOW
F = 0000
DATAOUT
IDT39C01C-001
JUNE 1986
Printed In U.S.A.


Integrated Device Technology Electronic Components Datasheet

IDT39C01D Datasheet

4-Bit CMOS Microprocessor Slice

No Preview Available !

IDT39C01C/D/E FOUR-BIT CMOS MICROPROCESSOR SLICE
MILITARV AND COMMERCIAL TEMPERATURE RANGES
A3
A2
A,
AO
16
18
17
RAM3
RAMo
Vee
F~O
10
h
12
CP
03
BO
B,
B2
B3
DIP
TOP VIEW
OE
V3
V2
V,
Vo
p-
OVR
Cn+4
G
F3
GND
Cn
14
15
13
Do
D,
D2
D3
00
IOT39C01C-002
~ ..~~~egl.:;:N"':::O<
Ia
17
RAM3
RAMo
Vee
F~O
10
h
12
CP
NC
NC
P
OVR
2...+4
G
F3
GND
Cn
14
15
13
OIl
I»O
lI
....
llIllIllOC
NWQCoJ~
C
....
Co
C0Z
LCC
TOP VIEW
IDT39C01C-003
FLATPACK
(Consult Factory)
PIN DESCRIPTIONS
PIN NAME
Ao-A3
Bo-B3
I/O
I
I
10-1.
0 0-03
VO-V3
F3
F~O
Cn
C n+4
Q3
RAM3
I
I
0
0
0
I
0
I/O
Qo
RAMo
OE
G,P
OVR
CP
I/O
I
0
0
I
DESCRIPTION
Four address inputs to the register file which selects one register and displays its contents through the A-port.
Four address inputs to the register file which selects one of the registers in the file, the contents of which is
displayed through the B-port. It also selects the location into which new data can be written when the clock
goes LOW.
Nine instruction control lines which determine what data source will be applied to the ALU 10• 1• 20 what function
the ALU will perform 13. 4. 50 and what data is to be deposited in the Q Register or the register file 1.,7, ..
Four-bit direct data inputs which are the ALU data source for entering external data into the device. Do is the
LSB.
Four three-state output lines which, when enabled, display either the four outputs of the ALU or the data on
the A-port of the register stack. This is determined by the destination code 1•. 7..'
Most significant ALU output bit (sign-bit).
Open drain output which goes HIGH if the Fo-F3 ALU outputs are all LOW. This indicates that the result of an
ALU operation is zero (positive logic).
Carry-in to the internal ALU.
Carry-out of the internal ALU.
Bidirectional lines controlled by 16.7..' Both are three-state output drivers connected to the TTL-compatible
CMOS inputs. When the destination code on 1.,7.. indicates an up shift, the three-state outputs are enabled
and the MSB of the Q Register is available on the Q3 pin and the MSB of the ALU output is available on the
RAM3 pin. When the destination code indicates a down shift, the pins are the data inputs to the MSB of the
Q Register and the MSB of the RAM.
Both bidirectional lines function identically to Q3 and RAM3 lines except they are the LSB of the Q Register
and RAM.
Output enable which, when pulled HIGH, the V outputs are OFF (high impedance). When pulled LOW, the V
outputs are enabled.
Carry generate and carry propagate output of the ALU. These are used to perform a carry-Iookahead
operation.
Overflow. This pin is logically the Exclusive-OR of the carry-in and carry-out of the MSB of the ALU. At the
most significant end of the word, this pin indicates that the result of an arithmetic two's complement operation
has overflowed into the sign-bit.
Clock input. LOW-to-HIGH clock transitions will change the Q Register and the register file outputs. Clock
LOW time is internally the write enable time for the 16x4 RAM which compromises the master latches of the
register file. While the clock is LOW, the slave latches on the RAM outputs are closed, storing the data pre-
viously on the RAM outputs. Synchronous MASTER-SLAVE operation of the register file is achieved
by this.
3-2


Part Number IDT39C01D
Description 4-Bit CMOS Microprocessor Slice
Maker IDT
Total Page 11 Pages
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