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IDT49C465A - 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

Download the IDT49C465A datasheet PDF. This datasheet also covers the IDT49C465 variant, as both devices belong to the same 32-bit flow-thru error detection and correction unit family and are provided as variant models within a single manufacturer datasheet.

General Description

The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.

The chip provides single-error correction and two and three bit error detection of both hard and soft memory errors.

Key Features

  • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits.
  • Single-chip 64-bit Generate Mode.
  • Separate system and memory buses.
  • On-chip pipeline latch with external control.
  • Supports bidirectional and common I/O memories.
  • Corrects all single-bit errors.
  • Detects all double-bit errors, some multiple-bit errors.
  • Error Detection Time.
  • 12ns.
  • Error Correction Time.
  • 14ns.
  • On chip diagnostic registers.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT49C465_IntegratedDeviceTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT49C465A
Manufacturer IDT
File Size 402.45 KB
Description 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
Datasheet download datasheet IDT49C465A Datasheet

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Other Datasheets by IDT

Part Number Description
IDT49C460A 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
IDT49C460B 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
IDT49C460C 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
IDT49C460D 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
IDT49C460E 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Integrated Device Technology, Inc. 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C465 IDT49C465A FEATURES • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits • Single-chip 64-bit Generate Mode • Separate system and memory buses • On-chip pipeline latch with external control • Supports bidirectional and common I/O memories • Corrects all single-bit errors • Detects all double-bit errors, some multiple-bit errors • Error Detection Time — 12ns • Error Correction Time — 14ns • On chip diagnostic registers. • Parity generation and checking on system data bus • Low power CMOS — 100mA typical at 20MHZ • 144-pin PGA and PQFP packages • Military product compliant to MIL-STD 883, Class B DESCRIPTION The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.