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Integrated Device Technology Electronic Components Datasheet

IDT70V9199L Datasheet

HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

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IDT70V9199L pdf
HIGH-SPEED 3.3V
128K x9/x8
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM
IDT70V9199/099L
Features:
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 6/7.5/9/12ns (max.)
– Industrial: 9ns (max.)
Low-power operation
– IDT70V9199/099L
Active: 500mW (typ.)
Standby: 1.5mW (typ.)
Flow-Through or Pipelined output mode on either port via
the FT/PIPE pins
Dual chip enables allow for depth expansion without
additional logic
Counter enable and reset features
Full synchronous operation on both ports
– 3.5ns setup to clock and 0ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 6.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 10ns cycle time, 100MHz operation in Pipelined output mode
LVTTL- compatible, single 3.3V (±0.3V) power supply
Industrial temperature range (–40°C to +85°C) is
available for selected speeds
Available in a 100-pin Thin Quad Flatpack (TQFP)
Functional Block Diagram
R/WL
OEL
CE0L
CE1L
1
0
0/1
R/WR
OER
CE0R
1 CE1R
0
0/1
FT/PIPEL
I/O0L - I/O8L(1)
0/1 1
0
I/O
Control
I/O
Control
0 1 0/1
FT/PIPER
I/O0R - I/O8R(1.)
A16L
A0L
CLKL
ADSL
CNTENL
CNTRSTL
NOTE:
1. I/O0X - I/O7X for IDT70V9099.
Counter/
Address
Reg.
©2003 Integrated Device Technology, Inc.
MEMORY
ARRAY
1
Counter/
Address
Reg.
A16R
A0R
CLKR
ADSR
CNTENR
CNTRSTR
4859 drw 01
APRIL 2003
DSC-4859/3


Integrated Device Technology Electronic Components Datasheet

IDT70V9199L Datasheet

HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

No Preview Available !

IDT70V9199L pdf
IDT70V9199/099L
High-Speed 3.3V 128K x9/x8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Description:
The IDT70V9199/099 is a high-speed128K x9/x8 bit synchronous
Dual-Port RAM. The memory array utilizes Dual-Port memory cells to
allow simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide minimal setup and hold times.
The timing latitude provided by this approach allows systems to be
designed with very short cycle times.
With an input data register, the IDT70V9199/099 has been optimized
for applications having unidirectional or bidirectional data flow in bursts. An
automatic power down feature, controlled by CE0 and CE1, permits the
on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 500mW of power.
Pin Configuration(1,2,3)
04/02/03
Index
NC
NC
A7L
A8L
A9L
A10L
A11L
A12L
A13L
A14L
A15L
A16L
VDD
NC
NC
NC
NC
CE0L
CE1L
CNTRSTL
R/WL
OEL
FT/PIPEL
NC
NC
1100 99
98 97
96 95
94
93
92
91
90 89
88 87
86
85
84 83
82
81
80
79
78 77
76
75
2 74
3 73
4 72
5 71
6 70
7 69
8 68
9 67
10 66
11 65
12
70V9199PF
64
13
PN100-1(4)
63
14 62
15
100-Pin TQFP
61
16
Top View(5)
60
17 59
18 58
19 57
20 56
21 55
22 54
23 53
24 52
25 51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
NC
NC
A7R
A8R
A9R
A10R
A11R
A12R
A13R
A14R
A15R
A16R
VSS
NC
NC
NC
NC
CE0R
CE1R
.
CNTRSTR
R/WR
OER
FT/PIPER
GND
NC
4859 drw 02
NOTES:
1. All VDD pins must be connected to power supply.
2. All VSS pins must be connected to ground supply.
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.422


Part Number IDT70V9199L
Description HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
Maker IDT
Total Page 17 Pages
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