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IDT72285 - (IDT72275 / IDT72285) CMOS SUPERSYNC FIFO

This page provides the datasheet information for the IDT72285, a member of the IDT72275 (IDT72275 / IDT72285) CMOS SUPERSYNC FIFO family.

Description

The IDT72275/72285 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls.

The limitation of the frequency of one clock input with resp

Features

  • Choose among the following memory organizations: IDT72275 32,768 x 18 IDT72285 65,536 x 18.
  • Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs.
  • 10ns read/write cycle time (6.5ns access time).
  • Fixed, low first word data latency time.
  • Auto power down minimizes standby power consumption.
  • Master Reset clears entire FIFO.
  • Partial Reset clears data, but retains programmable settings.
  • Retransmit operation with fixed, low.

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Datasheet preview – IDT72285

Datasheet Details

Part number IDT72285
Manufacturer IDT
File Size 259.34 KB
Description (IDT72275 / IDT72285) CMOS SUPERSYNC FIFO
Datasheet download datasheet IDT72285 Datasheet
Additional preview pages of the IDT72285 datasheet.
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Full PDF Text Transcription

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CMOS SUPERSYNC FIFO™ 32,768 x 18 65,536 x 18 Integrated Device Technology, Inc. PRELIMINARY IDT72275 IDT72285 FEATURES: • Choose among the following memory organizations: IDT72275 32,768 x 18 IDT72285 65,536 x 18 • Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs • 10ns read/write cycle time (6.
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