13-bit to 26-bit registered buffer.
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1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859 2.3V to 2.7V Operation for PC1600, PC2100, and PC27.
* Along with CSPT857C, Zero Delay PLL Clock buffer, provides complete solution for DDR1 DIMMs
FUNCTIONAL BLOCK DI.
APPLICATIONS:
* Along with CSPT857C, Zero Delay PLL Clock buffer, provides complete solution for DDR1 DIMMs
FUNCTIONAL BLOCK DIAGRAM
51
RESET
CLK CLK
48 49
VREF D1
45 35 1D C1 R 32 Q1B
16
Q1A
TO 12 OTHER CHANNELS
COMMERCIAL TEMPERATU.
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